1. Field of the Disclosure
The present disclosure relates to memory circuits in general and in particular to sensing schemes for memory circuits with single ended sensing.
2. Description of the Related Art
System on chip (SOC) designs are being increasingly used in consumer electronics market due to their low power consumption and high speed. A large portion of the chip area of an SOC is occupied by memory circuits. SOCs are increasingly using read only memories (ROM) to improve their power consumption and speed. For example, digital signal processors (DSP) implement fixed coefficients for mathematical processing such as digital transforms using ROMs.
Conventional ROM circuits perform bitline pre-charge and discharge operations. The voltage levels of the ROM cells are sensed after the discharge of the pre-charged bitline. Waiting for the bitline to discharge often contributes to large memory access time. Conventional memory circuits therefore have large memory access time, thereby slowing the performance of the SOC chips using the ROM. Furthermore, full precharge and discharge operations result in higher dynamic power dissipation in conventional memory circuits.